AO4822A 30v dual n-channel mosfet general description product summary v ds i d (at v gs =10v) 8a r ds(on) (at v gs =10v) <19m w r ds(on) (at v gs = 4.5v) < 26m w esd protected 100% uis tested 100% r g tested symbol v ds v gs v 20 gate-source voltage drain-source voltage 30 the AO4822A uses advanced trench technology to provide excellent r ds(on) and low gate charge. this device is suitable for use as a load switch or in p wm applications. v maximum units parameter absolute maximum ratings t a =25c unless otherwise noted 30v soic-8 top view bottom view g d s g d s g1 s1 g2 s2 d1 d1 d2 d2 2 4 5 1 3 86 7 top view pin1 v gs i dm i as , i ar e as , e ar t j , t stg symbol t 10s steady-state steady-state r q jl 1.3 t a =70c junction and storage temperature range -55 to 150 c thermal characteristics w 2 units parameter typ max c/w r q ja 48 74 62.5 maximum junction-to-ambient a v 20 gate-source voltage mj avalanche current c 18 a 19 a i d 8 6.5 48 t a =25c t a =70c power dissipation b p d avalanche energy l=0.1mh c pulsed drain current c continuous drain current t a =25c maximum junction-to-lead c/w c/w maximum junction-to-ambient a d 32 90 40 soic-8 top view bottom view g d s g d s g1 s1 g2 s2 d1 d1 d2 d2 2 4 5 1 3 86 7 top view pin1 rev 4 : november 2010 www.aosmd.com page 1 of 6
AO4822A symbol min typ max units bv dss 30 v v ds =30v, v gs =0v 1 t j =55c 5 i gss 10 m a v gs(th) gate threshold voltage 1.2 1.8 2.4 v i d(on) 48 a 15.5 19 t j =125c 21 25 18.5 26 m w g fs 30 s v sd 0.75 1 v i s 2.5 a c iss 600 740 888 pf c oss 77 110 145 pf c rss 50 82 115 pf r g 0.5 1.1 1.7 w q g (10v) 12 15 18 nc q g (4.5v) 6 7.5 9 nc q gs 2 2.5 3 nc q gd 2 3 5 nc t d(on) 5 ns t 3.5 ns maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters turn-on rise time v =10v, v =15v, r =1.8 w , gate resistance v gs =0v, v ds =0v, f=1mhz total gate charge v gs =10v, v ds =15v, i d =8a gate source charge gate drain charge total gate charge r ds(on) static drain-source on-resistance i dss m a v ds =v gs i d =250 m a v ds =0v, v gs = 20v zero gate voltage drain current gate-body leakage current m w on state drain current i d =250 m a, v gs =0v v gs =10v, v ds =5v v gs =10v, i d =8a forward transconductance diode forward voltage i s =1a,v gs =0v v ds =5v, i d =8a v gs =4.5v, i d =6a reverse transfer capacitance v gs =0v, v ds =15v, f=1mhz switching parameters electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions drain-source breakdown voltage t r 3.5 ns t d(off) 19 ns t f 3.5 ns t rr 6 8 10 ns q rr 14 18 22 nc components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery charge i f =8a, di/dt=500a/ m s turn-on rise time turn-off delaytime v gs =10v, v ds =15v, r l =1.8 w , r gen =3 w turn-off fall time i f =8a, di/dt=500a/ m s body diode reverse recovery time a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the value in any given application depends on the user' s specific board design. b. the power dissipation p d is based on t j(max) =150 c, using 10s junction-to-ambient thermal resistance. c. repetitive rating, pulse width limited by junct ion temperature t j(max) =150 c. ratings are based on low frequency and duty cycl es to keep initialt j =25 c. d. the r q ja is the sum of the thermal impedence from junction t o lead r q jl and lead to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-ambien t thermal impedence which is measured with the devi ce mounted on 1in 2 fr-4 board with 2oz. copper, assuming a maximum junction temperatur e of t j(max) =150 c. the soa curve provides a single pulse rating. rev 4: november 2010 www.aosmd.com page 2 of 6
AO4822A typical electrical and thermal characteristics 17 52 10 0 18 0 5 10 15 20 25 30 1 1.5 2 2.5 3 3.5 4 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 10 15 20 25 30 0 5 10 15 20 r ds(on) (m w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 0.8 1 1.2 1.4 1.6 0 25 50 75 100 125 150 175 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =4.5v i d =6a v gs =10v i d =8a 25 c 125 c v ds =5v v gs =4.5v v gs =10v 0 5 10 15 20 25 30 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =2.5v 3.5v 10v 3v 4v 40 0 5 10 15 20 25 30 1 1.5 2 2.5 3 3.5 4 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 10 15 20 25 30 0 5 10 15 20 r ds(on) (m w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 1.2 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c 0.8 1 1.2 1.4 1.6 0 25 50 75 100 125 150 175 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =4.5v i d =6a v gs =10v i d =8a 10 15 20 25 30 35 40 2 4 6 8 10 r ds(on) (m w ww w ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) 25 c 125 c v ds =5v v gs =4.5v v gs =10v i d =8a 25 c 125 c 0 5 10 15 20 25 30 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =2.5v 3.5v 10v 3v 4v rev 4: november 2010 www.aosmd.com page 3 of 6
AO4822A typical electrical and thermal characteristics 0 2 4 6 8 10 0 5 10 15 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 200 400 600 800 1000 1200 0 5 10 15 20 25 30 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss c oss c rss v ds =15v i d =8a 1 10 100 0.000001 0.00001 0.0001 0.001 i ar (a) peak avalanche current time in avalanche, t a (s) figure 9: single pulse avalanche capability (note c) t a =25 c t a =150 c t a =100 c t a =125 c 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 i d (amps) v ds (volts) figure 10: maximum forward biased safe operating area (note f) 10s 1ms dc r ds(on) limited t j(max) =150 c t a =25 c 100 m s 10 m s 10ms 0 2 4 6 8 10 0 5 10 15 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 200 400 600 800 1000 1200 0 5 10 15 20 25 30 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss c oss c rss v ds =15v i d =8a 1 10 100 0.000001 0.00001 0.0001 0.001 i ar (a) peak avalanche current time in avalanche, t a (s) figure 9: single pulse avalanche capability (note c) t a =25 c t a =150 c t a =100 c t a =125 c 1 10 100 1000 10000 0.00001 0.001 0.1 10 1000 power (w) pulse width (s) figure 11: single pulse power rating junction-to-am bient (note f) t a =25 c 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 i d (amps) v ds (volts) figure 10: maximum forward biased safe operating area (note f) 10s 1ms dc r ds(on) limited t j(max) =150 c t a =25 c 100 m s 10 m s 10ms rev 4: november 2010 www.aosmd.com page 4 of 6
AO4822A typical electrical and thermal characteristics 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 z q qq q ja normalized transient thermal resistance pulse width (s) figure 12: normalized maximum transient thermal imp edance (note f) single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse r q ja =90 c/w 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 z q qq q ja normalized transient thermal resistance pulse width (s) figure 12: normalized maximum transient thermal imp edance (note f) single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse r q ja =90 c/w rev 4: november 2010 www.aosmd.com page 5 of 6
AO4822A - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off id + l vgs vds bv unclamped inductive switching (uis) test circuit & waveforms vds dss 2 e = 1/2 li ar ar - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off vdd vgs id vgs rg dut - + vdc l vgs vds id vgs bv i unclamped inductive switching (uis) test circuit & waveforms ig vgs - + vdc dut l vds vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar dss 2 e = 1/2 li di/dt i rm rr vdd vdd q = - idt ar ar t rr rev 4: november 2010 www.aosmd.com page 6 of 6
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